1. Field of the Invention
The present invention relates in general to a method of manufacturing a charge transfer device and particularly to a method of manufacturing a charge transfer device in which an asymmetrical potential well is formed by constructing narrower portions in the direction of charge transfer in the transfer channel which is bordered by highly doped channel stoppers.
2. Description of the Prior Art
Charge transfer devices have been well known for storing and transferring charges in a storage medium by the use of appropriate potentials which are applied upon an insulating layer overlying one surface of the device. The charge coupled devices are applicable in many applications for example as delay lines, memory devices and image sensors. The article entitled "Charge Coupled Imaging-State of the Art" which appeared in the magazine "Solid State Devices" dated 1973 at pages 83 through 107, discloses a number of charge coupled devices as well as charge coupled image sensors.
One type of charge coupled image sensor device is known as a so-called frame transfer system.
As shown in FIG. 1, a charge coupled image sensor device comprises a sensor portion 1, a temporary storage portion 2 and a read-out horizontal shift register 3. The sensor portion 1 generates charges corresponding to the intensity of incident light images on each of the sensor cells and the charges are transferred to the storage portion 2 from the image sensor 1 in the vertical direction relative to FIG. 1.
The storage portion 2 stores the charges temporarily and transfers them in the vertical direction. The horizontal shift register 3 transfers the charges which are transferred from the last stage of the storage section 2 in the horizontal direction to the output circuit. Thus, the charges corresponding to the images can be read out from the output terminal t.
The sensor portion 1 comprises a plurality of vertical charge transfer devices 4 arranged parallel to each other and the storage portion 2 also comprises a plurality of vertical charge transfer devices 4 corresponding to those of the sensor portion and the shift register 3 also comprises a charge transfer device 4.
FIGS. 2 and 3 illustrate an example of the sensor portion 1 of the charge transfer imaging device. As shown from a top plan view in FIG. 2, there are provided a plurality of charge transfer devices 4 arranged parallel in column to make vertical lines. The device comprises a substrate 5 formed of, for example, silicon upon which a dielectric layer 6 of silicon dioxide or some other similar substance is deposited and a plurality of electrodes 7 are formed on the silicon dioxide layer 6 and are arranged in charge transfer direction to form a transfer device. As shown in FIG. 2, the electrodes 7 are provided commonly to the common horizontal lines of each charge transfer device 4. That is to say each electrode 7 extends in the direction transverse to the direction of charge transfer direction. Every third gate electrode 7 is electrically connected together so that there are three sets of electrodes to which can be applied three phase clock voltages .phi..sub.1, .phi..sub.2 and .phi..sub.3 as shown. There are also provided channel stoppers 8 adjacent to the major surface 5a which have higher impurity concentration than that of the substrate between each of the charge transfer devices so as to prevent mutual flow of signal charges between each of the charge transfer devices. Incident light is received onto the substrate and passes into the substrate through gaps g formed between each of the electrodes and charges are generated corresponding to the intensity of the incident light.
In such three phase charge transfer devices, three phase clock voltages .phi..sub.1, .phi..sub.2 and .phi..sub.3 form potential wells having different depths in the substrate adjacent gate electrodes so that electrical charges generated by the incident light can be transferred unilaterally through the devices. Three phase charge transfer devices have a number of disadvantages which are well known.
FIGS. 4 and 5 illustrate another example of the sensor portion of charge coupled devices of the prior art utilizing two phase clock drive in which the elements similar to those in FIGS. 2 and 3 are indicated by the same reference numerals. In this case, there is provided a substrate 5 of silicon upon which a first dielectric layer 6A of silicon dioxide is deposited and a plurality of first electrodes 7A are formed in predetermined parallel arrangement. The first electrodes are formed of polycrystalline silicon doped with an impurity. A second insulating layer 6B is formed completely over the surface including the first insulating layer 6A upon which a plurality of second electrodes 7B are formed of metal deposited between the first polycrystalline silicon electrodes 7A. The neighboring pairs of electrodes 7A and 7B are commonly connected and serve as gate electrodes 7. Every other pair of electrodes receive two phase clock voltages .phi..sub.1 and .phi..sub.2. The first electrodes are transparent so that light passes through them into the substrate. The first electrodes 7A is arranged over the first insulating layer 6A while the second electrode 7B is arranged over the first insulating layer 6A and the second insulating layer 6B. Thus, the thickness of the insulating layers are different under the first electrode 7A and under the second electrode 7B to thus form an asymmetrical potential well in the direction of charge transfer under the application of clock voltages. Thus, charges generated by the incident light can be transferred unilaterally through the device. However, two phase charge coupled devices in which the thickness of the insulating layer is constructed different under the electrodes 7A and 7B are very difficult to fabricate. Also, it is very troublesome to construct two separate sets of electrodes 7A and 7B.
Also, other prior art devices such as shown in Amelio U.S. Pat. No. 3,995,302 wherein the impurity concentration of the substrate surface under each electrode is caused to vary between the front and rear edges are known, however, such devices are also very difficult to manufacture. Furthermore, the miniaturization of such devices is very difficult due to the varying thickness of the insulating layers and also due to the variation in the doping impurity concentrations.
So as to overcome the above mentioned disadvantages, Y. Hagiwara and H. Yamazaki proposed a new charge transfer device shown in copending U.S. patent application Ser. Nos. 703,792 filed July 9, 1976 assigned to the assignee of the present application in which the charge transfer channel has narrower portions bordered by highly doped channel stoppers so as to cause an asymmetrical potential well in the direction of charge transfer.
FIGS. 6 to 9 illustrate a sensor portion of charge transfer devices constructed according to teaching of copending patent application Ser. No. 703,792. In this structure, there are also provided channel stoppers 8 having higher impurity concentration adjacent a major surface 5a of the semiconductor substrate 5 so as to isolate each vertical line of the charge transfer device. The portions between the channel stoppers are transfer channels of each of the charge transfer devices. An insulating layer 6 is deposited on the major surface 5a of the substrate on which a plurality of electrodes 7 are formed transverse to the direction of vertical lines and formed commonly over the vertical lines with a predetermined gap g therebetween. Projecting portions 8a which have higher impurity concentration then the portions of the transfer channels project into each of the vertical lines and are formed at the same time as the channel stoppers 8 are diffused. The projection portions are formed at the rear edges of the portions of the transfer channel under each of the electrodes 7 relative to the direction of charge transfer direction illustrated by the arrow A in FIG. 6. The projection portions form narrower portions in the transfer channel which effect the depth of potential wells formed therein so as to make an asymmetrical potential well in the direction of charge transfer. Then in a manner similar to the known two phase charge coupled devices, every other electrode receives two phase clock voltages .phi..sub.1 and .phi..sub.2. In these constructions, the surface potential of storage regions under the electrodes 10 are different between the narrower portion and under the rest of the portions of the electrode. The result is that the potential well is asymmetrical in the direction of charge transfer. FIG. 9 illustrates a diagram of surface potential wherein .phi..sub.1 is off and .phi..sub.2 is on. As shown by the dotted line in FIG. 9, there are formed potential barriers corresponding to the narrower portions 11 which are higher than the remaining portions of the storage region by an amount .DELTA.a and .DELTA.b. Then there is provided a step-like potential from the region under the electrode which is not receiving any voltage to the region under the electrode which has applied thereto the voltage .phi. to cause the charge flow in the direction shown by the arrow B.
Thus, the charge transfer device which is provided has narrower portions formed by the channel stoppers in the transfer channel can be operated by two phase clock voltages without changing the thickness of the insulating layer or the surface impurity concentration and asymmetrical potential wells are formed without these expedients. In this structure, it is very desirable to provide the correct registration between the narrower portions 11 of the transfer channel and electrodes 7, in other words, the relationship between the rear edges of the projection portions 8a and the rear edges of the electrode 7 and the front edge of the preceding electrode.